2#include "esp_clk_tree.h"
3#include "esp_private/adc_share_hw_ctrl.h"
4#include "esp_private/esp_clk_tree_common.h"
5#include "esp_private/sar_periph_ctrl.h"
6#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
7#define sens_dev_t sens_dev_s
8#include "hal/adc_oneshot_hal.h"
11#include "hal/adc_oneshot_hal.h"
14extern portMUX_TYPE rtc_spinlock;
19bool ESP32ADC::InitOneshot()
21 ASSERT(oneshot_hal_ ==
nullptr);
22 if (oneshot_hal_ !=
nullptr)
27 oneshot_hal_ =
new adc_oneshot_hal_ctx_t{};
29 adc_oneshot_hal_cfg_t unit_cfg = {};
30 unit_cfg.unit = unit_;
31 unit_cfg.work_mode = ADC_HAL_SINGLE_READ_MODE;
32#if SOC_ADC_RTC_CTRL_SUPPORTED
33 unit_cfg.clk_src = ADC_RTC_CLK_SRC_DEFAULT;
35 unit_cfg.clk_src = ADC_DIGI_CLK_SRC_DEFAULT;
37 unit_cfg.clk_src_freq_hz = 0U;
39#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
40 if (esp_clk_tree_src_get_freq_hz(
static_cast<soc_module_clk_t
>(unit_cfg.clk_src),
41 ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,
42 &unit_cfg.clk_src_freq_hz) != ESP_OK)
46 adc_apb_periph_claim();
49 adc_oneshot_hal_init(oneshot_hal_, &unit_cfg);
50 sar_periph_ctrl_adc_oneshot_power_acquire();
51 oneshot_inited_ =
true;
53#if SOC_ADC_CALIBRATION_V1_SUPPORTED
54 portENTER_CRITICAL(&rtc_spinlock);
55 adc_hal_calibration_init(unit_);
56 adc_set_hw_calibration_code(unit_, attenuation_);
57 portEXIT_CRITICAL(&rtc_spinlock);
60 adc_oneshot_hal_chan_cfg_t chan_cfg = {};
61 chan_cfg.atten = attenuation_;
62 chan_cfg.bitwidth = bitwidth_;
64 for (uint8_t i = 0; i < num_channels_; ++i)
66 ASSERT(IsValidChannel(channel_ids_[i]));
67 if (!IsValidChannel(channel_ids_[i]))
72 portENTER_CRITICAL(&rtc_spinlock);
73 adc_oneshot_hal_channel_config(oneshot_hal_, &chan_cfg, channel_ids_[i]);
74 portEXIT_CRITICAL(&rtc_spinlock);
76 ConfigureAnalogPad(channel_ids_[i]);
77 channel_ready_[i] =
false;
78 latest_values_[i] = 0.0f;
82 backend_ = Backend::ONESHOT;