4#include "esp_clk_tree.h"
5#include "esp_private/adc_share_hw_ctrl.h"
6#include "esp_private/esp_clk_tree_common.h"
7#include "esp_private/sar_periph_ctrl.h"
8#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
9#define sens_dev_t sens_dev_s
10#include "hal/adc_oneshot_hal.h"
13#include "hal/adc_oneshot_hal.h"
16extern portMUX_TYPE rtc_spinlock;
21bool ESP32ADC::InitOneshot()
23 ASSERT(oneshot_hal_ ==
nullptr);
24 if (oneshot_hal_ !=
nullptr)
29 oneshot_hal_ =
new (std::nothrow) adc_oneshot_hal_ctx_t{};
30 ASSERT(oneshot_hal_ !=
nullptr);
31 if (oneshot_hal_ ==
nullptr)
36 adc_oneshot_hal_cfg_t unit_cfg = {};
37 unit_cfg.unit = unit_;
38 unit_cfg.work_mode = ADC_HAL_SINGLE_READ_MODE;
39#if SOC_ADC_RTC_CTRL_SUPPORTED
40 unit_cfg.clk_src = ADC_RTC_CLK_SRC_DEFAULT;
42 unit_cfg.clk_src = ADC_DIGI_CLK_SRC_DEFAULT;
44 unit_cfg.clk_src_freq_hz = 0U;
46#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
47 if (esp_clk_tree_src_get_freq_hz(
static_cast<soc_module_clk_t
>(unit_cfg.clk_src),
48 ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,
49 &unit_cfg.clk_src_freq_hz) != ESP_OK)
53 adc_apb_periph_claim();
56 adc_oneshot_hal_init(oneshot_hal_, &unit_cfg);
57 sar_periph_ctrl_adc_oneshot_power_acquire();
58 oneshot_inited_ =
true;
60#if SOC_ADC_CALIBRATION_V1_SUPPORTED
61 portENTER_CRITICAL(&rtc_spinlock);
62 adc_hal_calibration_init(unit_);
63 adc_set_hw_calibration_code(unit_, attenuation_);
64 portEXIT_CRITICAL(&rtc_spinlock);
67 adc_oneshot_hal_chan_cfg_t chan_cfg = {};
68 chan_cfg.atten = attenuation_;
69 chan_cfg.bitwidth = bitwidth_;
71 for (uint8_t i = 0; i < num_channels_; ++i)
73 ASSERT(IsValidChannel(channel_ids_[i]));
74 if (!IsValidChannel(channel_ids_[i]))
79 portENTER_CRITICAL(&rtc_spinlock);
80 adc_oneshot_hal_channel_config(oneshot_hal_, &chan_cfg, channel_ids_[i]);
81 portEXIT_CRITICAL(&rtc_spinlock);
83 ConfigureAnalogPad(channel_ids_[i]);
84 channel_ready_[i] =
false;
85 latest_values_[i] = 0.0f;
89 backend_ = Backend::ONESHOT;