hpm_gpio.cpp

#include "hpm_gpio.hpp"
 
#include <atomic>
 
#include "hpm_interrupt.h"
#include "hpm_ioc_regs.h"
 
using namespace LibXR;
 
HPMGPIO* HPMGPIO::map[HPMGPIO::PORT_COUNT][HPMGPIO::PIN_COUNT] = {};
GPIO_Type* HPMGPIO::port_controller_map[HPMGPIO::PORT_COUNT] = {};
HPMGPIO::PortIrqRouteState HPMGPIO::port_irq_route_map[HPMGPIO::PORT_COUNT] = {};
 
namespace
{
// Serialize shared per-port IRQ routing updates against task/ISR races on the local core.
std::atomic_flag g_hpm_gpio_irq_route_lock = ATOMIC_FLAG_INIT;
 
bool HPM_GPIO_IsFastController(GPIO_Type* gpio)
{
#if defined(HPM_FGPIO)
  return gpio == HPM_FGPIO;
#else
  (void)gpio;
  return false;
#endif
}
 
class HPMGPIOIrqRouteGuard
{
 public:
  HPMGPIOIrqRouteGuard()
      : irq_state_(disable_global_irq(CSR_MSTATUS_MIE_MASK) & CSR_MSTATUS_MIE_MASK)
  {
    while (g_hpm_gpio_irq_route_lock.test_and_set(std::memory_order_acquire))
    {
    }
  }
 
  ~HPMGPIOIrqRouteGuard()
  {
    g_hpm_gpio_irq_route_lock.clear(std::memory_order_release);
    restore_global_irq(irq_state_);
  }
 
  HPMGPIOIrqRouteGuard(const HPMGPIOIrqRouteGuard&) = delete;
  HPMGPIOIrqRouteGuard& operator=(const HPMGPIOIrqRouteGuard&) = delete;
 
 private:
  uint32_t irq_state_;
};
}  // namespace
 
static inline void HPM_GPIO_ConfigMuxToGPIO(GPIO_Type* gpio, uint32_t port,
                                            uint16_t pad_index,
                                            bool enable_loopback = true)
{
  uint32_t func_ctl = IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0);
  if (enable_loopback)
  {
    func_ctl |= IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
  }
  HPM_IOC->PAD[pad_index].FUNC_CTL = func_ctl;
 
  // GPIOY 端口需要额外通过 PIOC 选择 SOC GPIO 信号 / GPIOY needs extra PIOC routing.
#if defined(GPIO_DI_GPIOY) && defined(HPM_PIOC)
  if (port == GPIO_DI_GPIOY && (gpio == HPM_GPIO0 || HPM_GPIO_IsFastController(gpio)))
  {
    HPM_PIOC->PAD[pad_index].FUNC_CTL = IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3);
  }
#else
  (void)gpio;
  (void)port;
#endif
}
 
HPMGPIO::HPMGPIO(GPIO_Type* gpio, uint32_t port, uint8_t pin, uint32_t irq,
                 uint16_t pad_index)
    : gpio_(gpio),
      port_(port),
      pin_(pin),
      irq_(irq),
      pad_index_(pad_index == INVALID_PAD_INDEX ? ResolvePadIndex(gpio, port, pin)
                                                : pad_index)
{
  if (port_ < PORT_COUNT && pin_ < PIN_COUNT && !HPM_GPIO_IsFastController(gpio_))
  {
    map[port_][pin_] = this;
    if (port_controller_map[port_] == nullptr)
    {
      port_controller_map[port_] = gpio_;
    }
  }
}
 
ErrorCode HPMGPIO::EnableInterrupt()
{
  if (irq_ == INVALID_IRQ || port_ >= PORT_COUNT || pin_ >= PIN_COUNT)
  {
    return ErrorCode::ARG_ERR;
  }
  if (HPM_GPIO_IsFastController(gpio_))
  {
    return ErrorCode::NOT_SUPPORT;
  }
 
  HPMGPIOIrqRouteGuard guard;
  if (interrupt_enabled_)
  {
    return ErrorCode::OK;
  }
 
  PortIrqRouteState& route = port_irq_route_map[port_];
  const bool needs_port_irq_enable = (route.enabled_pin_count == 0u);
  if (!needs_port_irq_enable && (route.controller != gpio_ || route.irq != irq_))
  {
    return ErrorCode::STATE_ERR;
  }
 
  gpio_enable_pin_interrupt(gpio_, port_, pin_);
 
  if (needs_port_irq_enable)
  {
    route.controller = gpio_;
    route.irq = irq_;
    intc_m_enable_irq_with_priority(irq_, 1);
  }
 
  ++route.enabled_pin_count;
  interrupt_enabled_ = true;
  return ErrorCode::OK;
}
 
ErrorCode HPMGPIO::DisableInterrupt()
{
  if (irq_ == INVALID_IRQ || port_ >= PORT_COUNT || pin_ >= PIN_COUNT)
  {
    return ErrorCode::ARG_ERR;
  }
  if (HPM_GPIO_IsFastController(gpio_))
  {
    return ErrorCode::NOT_SUPPORT;
  }
 
  HPMGPIOIrqRouteGuard guard;
  if (!interrupt_enabled_)
  {
    return ErrorCode::OK;
  }
 
  gpio_disable_pin_interrupt(gpio_, port_, pin_);
 
  PortIrqRouteState& route = port_irq_route_map[port_];
  if (route.enabled_pin_count == 0u)
  {
    route = {};
    interrupt_enabled_ = false;
    return ErrorCode::STATE_ERR;
  }
 
  if (route.controller != gpio_ || route.irq != irq_)
  {
    interrupt_enabled_ = false;
    return ErrorCode::STATE_ERR;
  }
 
  --route.enabled_pin_count;
  if (route.enabled_pin_count == 0u)
  {
    const uint32_t route_irq = route.irq;
    route = {};
    intc_m_disable_irq(route_irq);
  }
 
  interrupt_enabled_ = false;
  return ErrorCode::OK;
}
 
ErrorCode HPMGPIO::SetConfig(Configuration config)
{
  if (port_ >= PORT_COUNT || pin_ >= PIN_COUNT)
  {
    return ErrorCode::ARG_ERR;
  }
 
  switch (config.pull)
  {
    case Pull::NONE:
    case Pull::UP:
    case Pull::DOWN:
      break;
    default:
      return ErrorCode::ARG_ERR;
  }
 
  const bool is_interrupt_direction =
      config.direction == Direction::FALL_INTERRUPT ||
      config.direction == Direction::RISING_INTERRUPT ||
      config.direction == Direction::FALL_RISING_INTERRUPT;
  if (is_interrupt_direction && HPM_GPIO_IsFastController(gpio_))
  {
    return ErrorCode::NOT_SUPPORT;
  }
  if (config.direction == Direction::FALL_RISING_INTERRUPT)
  {
#if !defined(GPIO_SOC_HAS_EDGE_BOTH_INTERRUPT) || (GPIO_SOC_HAS_EDGE_BOTH_INTERRUPT != 1)
    return ErrorCode::NOT_SUPPORT;
#endif
  }
 
  if (pad_index_ != INVALID_PAD_INDEX)
  {
    // 保持接口自洽：先确保 PAD 复用到 GPIO / Keep API self-contained: force GPIO mux
    // first.
    HPM_GPIO_ConfigMuxToGPIO(gpio_, port_, pad_index_);
  }
 
  switch (config.direction)
  {
    case Direction::INPUT:
      gpio_set_pin_input(gpio_, port_, pin_);
      break;
    case Direction::OUTPUT_PUSH_PULL:
    case Direction::OUTPUT_OPEN_DRAIN:
      gpio_set_pin_output(gpio_, port_, pin_);
      break;
    case Direction::FALL_INTERRUPT:
      gpio_set_pin_input(gpio_, port_, pin_);
      gpio_config_pin_interrupt(gpio_, port_, pin_, gpio_interrupt_trigger_edge_falling);
      break;
    case Direction::RISING_INTERRUPT:
      gpio_set_pin_input(gpio_, port_, pin_);
      gpio_config_pin_interrupt(gpio_, port_, pin_, gpio_interrupt_trigger_edge_rising);
      break;
    case Direction::FALL_RISING_INTERRUPT:
#if defined(GPIO_SOC_HAS_EDGE_BOTH_INTERRUPT) && (GPIO_SOC_HAS_EDGE_BOTH_INTERRUPT == 1)
      gpio_set_pin_input(gpio_, port_, pin_);
      gpio_config_pin_interrupt(gpio_, port_, pin_, gpio_interrupt_trigger_edge_both);
      break;
#else
      return ErrorCode::NOT_SUPPORT;
#endif
    default:
      return ErrorCode::ARG_ERR;
  }
 
  if (pad_index_ != INVALID_PAD_INDEX)
  {
    uint32_t pad_ctl = HPM_IOC->PAD[pad_index_].PAD_CTL;
 
    // 仅更新上下拉与开漏位，保留其他电气属性 / Update pull + open-drain bits only.
    pad_ctl &=
        ~(IOC_PAD_PAD_CTL_PE_MASK | IOC_PAD_PAD_CTL_PS_MASK | IOC_PAD_PAD_CTL_OD_MASK);
 
    switch (config.pull)
    {
      case Pull::NONE:
        break;
      case Pull::UP:
        pad_ctl |= IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
        break;
      case Pull::DOWN:
        pad_ctl |= IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(0);
        break;
    }
 
    if (config.direction == Direction::OUTPUT_OPEN_DRAIN)
    {
      pad_ctl |= IOC_PAD_PAD_CTL_OD_SET(1);
    }
 
    HPM_IOC->PAD[pad_index_].PAD_CTL = pad_ctl;
  }
 
  return ErrorCode::OK;
}
 
ErrorCode HPMGPIO::SetAnalogHighImpedance()
{
  if (port_ >= PORT_COUNT || pin_ >= PIN_COUNT)
  {
    return ErrorCode::ARG_ERR;
  }
 
  if (pad_index_ == INVALID_PAD_INDEX)
  {
    return ErrorCode::NOT_SUPPORT;
  }
 
  if (interrupt_enabled_)
  {
    ErrorCode ans = DisableInterrupt();
    if (ans != ErrorCode::OK)
    {
      return ans;
    }
  }
  else
  {
    gpio_disable_pin_interrupt(gpio_, port_, pin_);
  }
 
  gpio_set_pin_input(gpio_, port_, pin_);
 
  HPM_IOC->PAD[pad_index_].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
 
  uint32_t pad_ctl = HPM_IOC->PAD[pad_index_].PAD_CTL;
  pad_ctl &= ~(IOC_PAD_PAD_CTL_PE_MASK | IOC_PAD_PAD_CTL_OD_MASK);
  HPM_IOC->PAD[pad_index_].PAD_CTL = pad_ctl;
 
  return ErrorCode::OK;
}
 
void HPMGPIO::CheckInterrupt(uint32_t port)
{
  if (port >= PORT_COUNT)
  {
    return;
  }
 
  GPIO_Type* controller = port_controller_map[port];
  if (controller == nullptr)
  {
    return;
  }
 
  const uint32_t flags = gpio_get_port_interrupt_flags(controller, port);
  if (flags == 0u)
  {
    return;
  }
 
  for (uint8_t pin = 0; pin < PIN_COUNT; ++pin)
  {
    if ((flags & (1u << pin)) == 0u)
    {
      continue;
    }
 
    gpio_clear_pin_interrupt_flag(controller, port, pin);
    if (auto* gpio = map[port][pin]; gpio != nullptr && gpio->interrupt_enabled_)
    {
      gpio->callback_.Run(true);
    }
  }
}
 
uint16_t HPMGPIO::ResolvePadIndex(GPIO_Type* gpio, uint32_t port, uint8_t pin)
{
  if (gpio != HPM_GPIO0 && !HPM_GPIO_IsFastController(gpio))
  {
    return INVALID_PAD_INDEX;
  }
 
  switch (port)
  {
#if defined(GPIO_DI_GPIOA) && defined(IOC_PAD_PA00)
    case GPIO_DI_GPIOA:
      return static_cast<uint16_t>(IOC_PAD_PA00 + pin);
#endif
#if defined(GPIO_DI_GPIOB) && defined(IOC_PAD_PB00)
    case GPIO_DI_GPIOB:
      return static_cast<uint16_t>(IOC_PAD_PB00 + pin);
#endif
#if defined(GPIO_DI_GPIOX) && defined(IOC_PAD_PX00)
    case GPIO_DI_GPIOX:
      return pin < 8u ? static_cast<uint16_t>(IOC_PAD_PX00 + pin) : INVALID_PAD_INDEX;
#endif
#if defined(GPIO_DI_GPIOY) && defined(IOC_PAD_PY00)
    case GPIO_DI_GPIOY:
      return pin < 8u ? static_cast<uint16_t>(IOC_PAD_PY00 + pin) : INVALID_PAD_INDEX;
#endif
    default:
      return INVALID_PAD_INDEX;
  }
}
 
extern "C" void libxr_hpm_gpio_check_interrupt(uint32_t port)
{
  HPMGPIO::CheckInterrupt(port);
}