1#include "mspm0_i2c.hpp"
3#include <ti/driverlib/dl_dma.h>
13constexpr uint32_t MSPM0_I2C_WAIT_IDLE_TIMEOUT = 300000;
14constexpr uint32_t MSPM0_I2C_WAIT_BUS_TIMEOUT = 300000;
15constexpr uint32_t MSPM0_I2C_WAIT_FIFO_TIMEOUT = 300000;
16constexpr uint32_t MSPM0_I2C_POLLING_ATTEMPTS = 2;
17constexpr uint32_t MSPM0_I2C_MEMREAD_RS_ATTEMPTS = 2;
18constexpr uint32_t MSPM0_I2C_MEMREAD_FALLBACK_ATTEMPTS = 3;
20constexpr uint16_t MSPM0_I2C_MAX_TRANSFER_SIZE = 0x0FFF;
22#if !defined(DMA_CH_TX_CHAN_ID) || !defined(DMA_CH_RX_CHAN_ID)
23#error "MSPM0I2C requires SysConfig DMA channels (DMA_CH_TX_CHAN_ID/DMA_CH_RX_CHAN_ID)."
26constexpr DL_DMA_Config MSPM0_I2C_DMA_TX_CONFIG_BASE = {
28 .triggerType = DL_DMA_TRIGGER_TYPE_EXTERNAL,
29 .transferMode = DL_DMA_SINGLE_TRANSFER_MODE,
30 .extendedMode = DL_DMA_NORMAL_MODE,
31 .srcWidth = DL_DMA_WIDTH_BYTE,
32 .destWidth = DL_DMA_WIDTH_BYTE,
33 .srcIncrement = DL_DMA_ADDR_INCREMENT,
34 .destIncrement = DL_DMA_ADDR_UNCHANGED,
37constexpr DL_DMA_Config MSPM0_I2C_DMA_RX_CONFIG_BASE = {
39 .triggerType = DL_DMA_TRIGGER_TYPE_EXTERNAL,
40 .transferMode = DL_DMA_SINGLE_TRANSFER_MODE,
41 .extendedMode = DL_DMA_NORMAL_MODE,
42 .srcWidth = DL_DMA_WIDTH_BYTE,
43 .destWidth = DL_DMA_WIDTH_BYTE,
44 .srcIncrement = DL_DMA_ADDR_UNCHANGED,
45 .destIncrement = DL_DMA_ADDR_INCREMENT,
48constexpr uint32_t mspm0_i2c_dma_channel_mask(uint8_t channel_id)
50 return (1UL << channel_id);
53bool mspm0_i2c_resolve_dma_triggers(I2C_Regs* instance, uint8_t& tx_trigger,
56#if defined(I2C0_BASE) && defined(DMA_I2C0_TX_TRIG) && defined(DMA_I2C0_RX_TRIG)
59 tx_trigger = DMA_I2C0_TX_TRIG;
60 rx_trigger = DMA_I2C0_RX_TRIG;
64#if defined(I2C1_BASE) && defined(DMA_I2C1_TX_TRIG) && defined(DMA_I2C1_RX_TRIG)
67 tx_trigger = DMA_I2C1_TX_TRIG;
68 rx_trigger = DMA_I2C1_RX_TRIG;
72#if defined(I2C2_BASE) && defined(DMA_I2C2_TX_TRIG) && defined(DMA_I2C2_RX_TRIG)
75 tx_trigger = DMA_I2C2_TX_TRIG;
76 rx_trigger = DMA_I2C2_RX_TRIG;
80#if defined(I2C3_BASE) && defined(DMA_I2C3_TX_TRIG) && defined(DMA_I2C3_RX_TRIG)
83 tx_trigger = DMA_I2C3_TX_TRIG;
84 rx_trigger = DMA_I2C3_RX_TRIG;
91constexpr uint16_t mspm0_i2c_to_addr7(uint16_t slave_addr)
93 return static_cast<uint16_t
>((slave_addr >> 1) & 0x7F);
96void mspm0_i2c_recover_controller(I2C_Regs* instance)
98 DL_I2C_disableInterrupt(instance, 0xFFFFFFFFU);
99 DL_I2C_clearInterruptStatus(instance, 0xFFFFFFFFU);
100 DL_I2C_disableControllerReadOnTXEmpty(instance);
101 DL_I2C_resetControllerTransfer(instance);
102 DL_I2C_enableController(instance);
107MSPM0I2C::MSPM0I2C(Resources res,
RawData stage_buffer, uint32_t dma_enable_min_size,
111 stage_buffer_(stage_buffer),
112 dma_enable_min_size_(dma_enable_min_size)
114 ASSERT(res_.instance !=
nullptr);
115 ASSERT(res_.clock_freq > 0);
116 ASSERT(res_.index < MAX_I2C_INSTANCES);
117 ASSERT(stage_buffer_.addr_ !=
nullptr);
118 ASSERT(stage_buffer_.size_ > 0);
124 const ErrorCode SET_CFG_ANS = SetConfig(config);
125 ASSERT(SET_CFG_ANS == ErrorCode::OK);
128ErrorCode MSPM0I2C::CheckControllerError()
const
130 const uint32_t STATUS = DL_I2C_getControllerStatus(res_.instance);
131 if ((STATUS & DL_I2C_CONTROLLER_STATUS_ERROR) != 0 ||
132 (STATUS & DL_I2C_CONTROLLER_STATUS_ARBITRATION_LOST) != 0)
139ErrorCode MSPM0I2C::WaitControllerIdle()
const
141 uint32_t timeout = MSPM0_I2C_WAIT_IDLE_TIMEOUT;
142 while (timeout-- > 0)
144 if ((DL_I2C_getControllerStatus(res_.instance) & DL_I2C_CONTROLLER_STATUS_IDLE) != 0)
156ErrorCode MSPM0I2C::WaitTransactionDone()
const
158 uint32_t timeout = MSPM0_I2C_WAIT_FIFO_TIMEOUT;
159 while (timeout-- > 0)
161 if (DL_I2C_getTransactionCount(res_.instance) == 0)
175 uint32_t timeout = MSPM0_I2C_WAIT_BUS_TIMEOUT;
176 while (timeout-- > 0)
178 if ((DL_I2C_getControllerStatus(res_.instance) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS) ==
198 const uint32_t PERIOD_DEN = config.
clock_speed * 10U;
204 uint32_t period_factor = res_.clock_freq / PERIOD_DEN;
205 if (period_factor == 0)
209 if (period_factor > 128U)
214 const uint8_t TIMER_PERIOD =
static_cast<uint8_t
>(period_factor - 1U);
215 const DL_I2C_ClockConfig CLOCK_CONFIG = {
216 .clockSel = DL_I2C_CLOCK_BUSCLK,
217 .divideRatio = DL_I2C_CLOCK_DIVIDE_1,
220 uint8_t dma_tx_trigger = 0U;
221 uint8_t dma_rx_trigger = 0U;
223 mspm0_i2c_resolve_dma_triggers(res_.instance, dma_tx_trigger, dma_rx_trigger);
224 dma_enabled_ = USE_DMA;
226 DL_I2C_disableController(res_.instance);
227 DL_I2C_setClockConfig(res_.instance, &CLOCK_CONFIG);
228 DL_I2C_resetControllerTransfer(res_.instance);
229 DL_I2C_setTimerPeriod(res_.instance, TIMER_PERIOD);
230 DL_I2C_setControllerTXFIFOThreshold(
231 res_.instance, USE_DMA ? DL_I2C_TX_FIFO_LEVEL_EMPTY : DL_I2C_TX_FIFO_LEVEL_BYTES_1);
232 DL_I2C_setControllerRXFIFOThreshold(res_.instance, DL_I2C_RX_FIFO_LEVEL_BYTES_1);
233 DL_I2C_enableControllerClockStretching(res_.instance);
234 DL_I2C_disableInterrupt(res_.instance, 0xFFFFFFFFU);
235 DL_I2C_clearInterruptStatus(res_.instance, 0xFFFFFFFFU);
237 DL_I2C_disableDMAEvent(res_.instance, DL_I2C_EVENT_ROUTE_1,
238 DL_I2C_DMA_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER);
239 DL_I2C_disableDMAEvent(res_.instance, DL_I2C_EVENT_ROUTE_2,
240 DL_I2C_DMA_INTERRUPT_CONTROLLER_RXFIFO_TRIGGER);
241 DL_DMA_disableChannel(DMA, DMA_CH_TX_CHAN_ID);
242 DL_DMA_disableChannel(DMA, DMA_CH_RX_CHAN_ID);
243 DL_DMA_clearInterruptStatus(DMA, mspm0_i2c_dma_channel_mask(DMA_CH_TX_CHAN_ID) |
244 mspm0_i2c_dma_channel_mask(DMA_CH_RX_CHAN_ID));
248 DL_DMA_Config dma_tx_config = MSPM0_I2C_DMA_TX_CONFIG_BASE;
249 DL_DMA_Config dma_rx_config = MSPM0_I2C_DMA_RX_CONFIG_BASE;
250 dma_tx_config.trigger = dma_tx_trigger;
251 dma_rx_config.trigger = dma_rx_trigger;
253 DL_I2C_enableDMAEvent(res_.instance, DL_I2C_EVENT_ROUTE_1,
254 DL_I2C_DMA_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER);
255 DL_I2C_enableDMAEvent(res_.instance, DL_I2C_EVENT_ROUTE_2,
256 DL_I2C_DMA_INTERRUPT_CONTROLLER_RXFIFO_TRIGGER);
257 DL_DMA_initChannel(DMA, DMA_CH_TX_CHAN_ID, &dma_tx_config);
258 DL_DMA_initChannel(DMA, DMA_CH_RX_CHAN_ID, &dma_rx_config);
261 DL_I2C_enableController(res_.instance);
266ErrorCode MSPM0I2C::PollingWrite7(uint16_t addr7,
const uint8_t* data,
size_t size)
272 if (size > MSPM0_I2C_MAX_TRANSFER_SIZE)
285 DL_I2C_clearInterruptStatus(res_.instance, 0xFFFFFFFFU);
288 DL_I2C_fillControllerTXFIFO(res_.instance, data,
static_cast<uint16_t
>(size));
289 DL_I2C_startControllerTransfer(res_.instance, addr7, DL_I2C_CONTROLLER_DIRECTION_TX,
290 static_cast<uint16_t
>(size));
294 uint32_t timeout = MSPM0_I2C_WAIT_FIFO_TIMEOUT;
295 while (DL_I2C_getRawInterruptStatus(
296 res_.instance, DL_I2C_INTERRUPT_CONTROLLER_TXFIFO_TRIGGER) == 0U)
308 sent += DL_I2C_fillControllerTXFIFO(res_.instance, data + sent,
309 static_cast<uint16_t
>(size - sent));
318 return CheckControllerError();
322 for (uint32_t attempt = 0; attempt < MSPM0_I2C_POLLING_ATTEMPTS; ++attempt)
324 last_error = attempt_once();
329 mspm0_i2c_recover_controller(res_.instance);
335ErrorCode MSPM0I2C::PollingRead7(uint16_t addr7, uint8_t* data,
size_t size)
341 if (size > MSPM0_I2C_MAX_TRANSFER_SIZE)
354 DL_I2C_clearInterruptStatus(res_.instance, 0xFFFFFFFFU);
355 DL_I2C_startControllerTransfer(res_.instance, addr7, DL_I2C_CONTROLLER_DIRECTION_RX,
356 static_cast<uint16_t
>(size));
359 while (received < size)
361 uint32_t timeout = MSPM0_I2C_WAIT_FIFO_TIMEOUT;
362 while (DL_I2C_isControllerRXFIFOEmpty(res_.instance))
374 while (!DL_I2C_isControllerRXFIFOEmpty(res_.instance) && received < size)
376 data[received++] = DL_I2C_receiveControllerData(res_.instance);
386 return CheckControllerError();
390 for (uint32_t attempt = 0; attempt < MSPM0_I2C_POLLING_ATTEMPTS; ++attempt)
392 last_error = attempt_once();
397 mspm0_i2c_recover_controller(res_.instance);
403ErrorCode MSPM0I2C::WaitDmaTransferDone(uint8_t channel_id)
const
405 uint32_t timeout = MSPM0_I2C_WAIT_FIFO_TIMEOUT;
406 while (DL_DMA_getTransferSize(DMA, channel_id) != 0U)
422 if (write_data.
size_ == 0)
426 if (write_data.
size_ > MSPM0_I2C_MAX_TRANSFER_SIZE)
431 auto stop_dma = [&]()
433 const uint32_t DMA_TX_MASK = mspm0_i2c_dma_channel_mask(DMA_CH_TX_CHAN_ID);
434 DL_DMA_disableChannel(DMA, DMA_CH_TX_CHAN_ID);
435 DL_DMA_clearInterruptStatus(DMA, DMA_TX_MASK);
446 DL_I2C_disableInterrupt(res_.instance, 0xFFFFFFFFU);
447 DL_I2C_clearInterruptStatus(res_.instance, 0xFFFFFFFFU);
449 const uint32_t DMA_TX_MASK = mspm0_i2c_dma_channel_mask(DMA_CH_TX_CHAN_ID);
450 DL_DMA_disableChannel(DMA, DMA_CH_TX_CHAN_ID);
451 DL_DMA_clearInterruptStatus(DMA, DMA_TX_MASK);
453 DMA, DMA_CH_TX_CHAN_ID,
454 static_cast<uint32_t
>(
reinterpret_cast<uintptr_t
>(write_data.
addr_)));
455 DL_DMA_setDestAddr(DMA, DMA_CH_TX_CHAN_ID,
456 static_cast<uint32_t
>(
457 reinterpret_cast<uintptr_t
>(&res_.instance->MASTER.MTXDATA)));
458 DL_DMA_setTransferSize(DMA, DMA_CH_TX_CHAN_ID,
459 static_cast<uint16_t
>(write_data.
size_));
460 DL_DMA_enableChannel(DMA, DMA_CH_TX_CHAN_ID);
462 DL_I2C_startControllerTransfer(res_.instance, addr7, DL_I2C_CONTROLLER_DIRECTION_TX,
463 static_cast<uint16_t
>(write_data.
size_));
465 ans = WaitDmaTransferDone(DMA_CH_TX_CHAN_ID);
472 ans = WaitTransactionDone();
487 return CheckControllerError();
491 for (uint32_t attempt = 0; attempt < MSPM0_I2C_POLLING_ATTEMPTS; ++attempt)
493 last_error = attempt_once();
498 mspm0_i2c_recover_controller(res_.instance);
506 if (read_data.
size_ == 0)
510 if (read_data.
size_ > MSPM0_I2C_MAX_TRANSFER_SIZE)
515 auto stop_dma = [&]()
517 const uint32_t DMA_RX_MASK = mspm0_i2c_dma_channel_mask(DMA_CH_RX_CHAN_ID);
518 DL_DMA_disableChannel(DMA, DMA_CH_RX_CHAN_ID);
519 DL_DMA_clearInterruptStatus(DMA, DMA_RX_MASK);
530 DL_I2C_disableInterrupt(res_.instance, 0xFFFFFFFFU);
531 DL_I2C_clearInterruptStatus(res_.instance, 0xFFFFFFFFU);
533 const uint32_t DMA_RX_MASK = mspm0_i2c_dma_channel_mask(DMA_CH_RX_CHAN_ID);
534 DL_DMA_disableChannel(DMA, DMA_CH_RX_CHAN_ID);
535 DL_DMA_clearInterruptStatus(DMA, DMA_RX_MASK);
536 DL_DMA_setSrcAddr(DMA, DMA_CH_RX_CHAN_ID,
537 static_cast<uint32_t
>(
538 reinterpret_cast<uintptr_t
>(&res_.instance->MASTER.MRXDATA)));
540 DMA, DMA_CH_RX_CHAN_ID,
541 static_cast<uint32_t
>(
reinterpret_cast<uintptr_t
>(read_data.
addr_)));
542 DL_DMA_setTransferSize(DMA, DMA_CH_RX_CHAN_ID,
543 static_cast<uint16_t
>(read_data.
size_));
544 DL_DMA_enableChannel(DMA, DMA_CH_RX_CHAN_ID);
546 DL_I2C_startControllerTransfer(res_.instance, addr7, DL_I2C_CONTROLLER_DIRECTION_RX,
547 static_cast<uint16_t
>(read_data.
size_));
549 ans = WaitDmaTransferDone(DMA_CH_RX_CHAN_ID);
556 ans = WaitTransactionDone();
571 return CheckControllerError();
575 for (uint32_t attempt = 0; attempt < MSPM0_I2C_POLLING_ATTEMPTS; ++attempt)
577 last_error = attempt_once();
582 mspm0_i2c_recover_controller(res_.instance);
591 if (read_data.
size_ == 0)
593 if (op.
type != ReadOperation::OperationType::BLOCK)
600 const uint16_t ADDR7 = mspm0_i2c_to_addr7(slave_addr);
602 if (dma_enabled_ && read_data.
size_ > dma_enable_min_size_)
604 ans = DmaRead7(ADDR7, read_data);
608 ans = PollingRead7(ADDR7,
static_cast<uint8_t*
>(read_data.
addr_), read_data.
size_);
611 if (op.
type != ReadOperation::OperationType::BLOCK)
621 if (write_data.
size_ == 0)
623 if (op.
type != WriteOperation::OperationType::BLOCK)
630 const uint16_t ADDR7 = mspm0_i2c_to_addr7(slave_addr);
632 if (dma_enabled_ && write_data.
size_ > dma_enable_min_size_)
634 ans = DmaWrite7(ADDR7, write_data);
638 ans = PollingWrite7(ADDR7,
static_cast<const uint8_t*
>(write_data.
addr_),
642 if (op.
type != WriteOperation::OperationType::BLOCK)
651 MemAddrLength mem_addr_size,
bool in_isr)
653 const size_t ADDR_SIZE = (mem_addr_size == MemAddrLength::BYTE_8) ? 1 : 2;
654 const size_t TOTAL_SIZE = ADDR_SIZE + write_data.
size_;
655 if (TOTAL_SIZE > MSPM0_I2C_MAX_TRANSFER_SIZE)
659 if (TOTAL_SIZE > stage_buffer_.
size_)
664 auto* tx =
static_cast<uint8_t*
>(stage_buffer_.
addr_);
667 tx[0] =
static_cast<uint8_t
>(mem_addr & 0xFF);
671 tx[0] =
static_cast<uint8_t
>((mem_addr >> 8) & 0xFF);
672 tx[1] =
static_cast<uint8_t
>(mem_addr & 0xFF);
674 if (write_data.
size_ > 0)
676 memcpy(tx + ADDR_SIZE, write_data.
addr_, write_data.
size_);
685 if (read_data.
size_ > MSPM0_I2C_MAX_TRANSFER_SIZE)
689 if (read_data.
size_ == 0)
691 if (op.
type != ReadOperation::OperationType::BLOCK)
698 const uint16_t ADDR7 = mspm0_i2c_to_addr7(slave_addr);
699 const size_t ADDR_SIZE = (mem_addr_size == MemAddrLength::BYTE_8) ? 1 : 2;
700 auto* addr_bytes =
static_cast<uint8_t*
>(stage_buffer_.
addr_);
701 if (stage_buffer_.
size_ < ADDR_SIZE)
708 addr_bytes[0] =
static_cast<uint8_t
>(mem_addr & 0xFF);
712 addr_bytes[0] =
static_cast<uint8_t
>((mem_addr >> 8) & 0xFF);
713 addr_bytes[1] =
static_cast<uint8_t
>(mem_addr & 0xFF);
718 if (op.
type != ReadOperation::OperationType::BLOCK)
725 auto try_repeated_start = [&]() ->
ErrorCode
733 DL_I2C_clearInterruptStatus(res_.instance, 0xFFFFFFFFU);
735 const uint16_t ADDR_SENT = DL_I2C_fillControllerTXFIFO(
736 res_.instance, addr_bytes,
static_cast<uint16_t
>(ADDR_SIZE));
737 if (ADDR_SENT != ADDR_SIZE)
742 DL_I2C_startControllerTransferAdvanced(
743 res_.instance, ADDR7, DL_I2C_CONTROLLER_DIRECTION_TX,
744 static_cast<uint16_t
>(ADDR_SIZE), DL_I2C_CONTROLLER_START_ENABLE,
745 DL_I2C_CONTROLLER_STOP_DISABLE, DL_I2C_CONTROLLER_ACK_ENABLE);
747 uint32_t tx_done_timeout = MSPM0_I2C_WAIT_FIFO_TIMEOUT;
748 while (DL_I2C_getRawInterruptStatus(res_.instance,
749 DL_I2C_INTERRUPT_CONTROLLER_TX_DONE) == 0U)
755 if (tx_done_timeout-- == 0U)
760 DL_I2C_clearInterruptStatus(res_.instance, DL_I2C_INTERRUPT_CONTROLLER_TX_DONE);
767 DL_I2C_startControllerTransferAdvanced(
768 res_.instance, ADDR7, DL_I2C_CONTROLLER_DIRECTION_RX,
769 static_cast<uint16_t
>(read_data.
size_), DL_I2C_CONTROLLER_START_ENABLE,
770 DL_I2C_CONTROLLER_STOP_ENABLE, DL_I2C_CONTROLLER_ACK_DISABLE);
773 auto* read_ptr =
static_cast<uint8_t*
>(read_data.
addr_);
774 while (received < read_data.
size_)
776 uint32_t timeout = MSPM0_I2C_WAIT_FIFO_TIMEOUT;
777 while (DL_I2C_isControllerRXFIFOEmpty(res_.instance))
789 while (!DL_I2C_isControllerRXFIFOEmpty(res_.instance) && received < read_data.
size_)
791 read_ptr[received++] = DL_I2C_receiveControllerData(res_.instance);
795 uint32_t rx_done_timeout = MSPM0_I2C_WAIT_FIFO_TIMEOUT;
796 while (DL_I2C_getRawInterruptStatus(res_.instance,
797 DL_I2C_INTERRUPT_CONTROLLER_RX_DONE) == 0U)
803 if (rx_done_timeout-- == 0U)
808 DL_I2C_clearInterruptStatus(res_.instance, DL_I2C_INTERRUPT_CONTROLLER_RX_DONE);
816 return CheckControllerError();
820 for (uint32_t attempt = 0; attempt < MSPM0_I2C_MEMREAD_RS_ATTEMPTS; ++attempt)
822 last_error = try_repeated_start();
827 mspm0_i2c_recover_controller(res_.instance);
830 for (uint32_t attempt = 0; attempt < MSPM0_I2C_MEMREAD_FALLBACK_ATTEMPTS; ++attempt)
832 last_error = PollingWrite7(ADDR7, addr_bytes, ADDR_SIZE);
836 PollingRead7(ADDR7,
static_cast<uint8_t*
>(read_data.
addr_), read_data.
size_);
842 mspm0_i2c_recover_controller(res_.instance);
845 return finalize(last_error);
常量原始数据封装类。 A class for encapsulating constant raw data.
size_t size_
数据大小(字节)。 The size of the data (in bytes).
const void * addr_
数据存储地址(常量)。 The storage address of the data (constant).
I2C(Inter-Integrated Circuit)接口类。 I2C (Inter-Integrated Circuit) interface class.
ErrorCode Read(uint16_t slave_addr, RawData read_data, ReadOperation &op, bool in_isr=false) override
读取 I2C 设备的数据。 Reads data from an I2C device.
ErrorCode MemWrite(uint16_t slave_addr, uint16_t mem_addr, ConstRawData write_data, WriteOperation &op, MemAddrLength mem_addr_size=MemAddrLength::BYTE_8, bool in_isr=false) override
向 I2C 设备指定寄存器写入数据。 Writes data to a specific register of an I2C device.
ErrorCode MemRead(uint16_t slave_addr, uint16_t mem_addr, RawData read_data, ReadOperation &op, MemAddrLength mem_addr_size=MemAddrLength::BYTE_8, bool in_isr=false) override
从 I2C 设备指定寄存器读取数据。 Reads data from a specific register of an I2C device.
ErrorCode SetConfig(Configuration config) override
配置 I2C 设备参数。 Configures the I2C device settings.
ErrorCode Write(uint16_t slave_addr, ConstRawData write_data, WriteOperation &op, bool in_isr=false) override
向 I2C 设备写入数据。 Writes data to an I2C device.
void UpdateStatus(bool in_isr, Status &&status)
Updates operation status based on type.
原始数据封装类。 A class for encapsulating raw data.
size_t size_
数据大小(字节)。 The size of the data (in bytes).
void * addr_
数据存储地址。 The storage address of the data.
@ NOT_SUPPORT
不支持 | Not supported
@ FAILED
操作失败 | Operation failed
@ OK
操作成功 | Operation successful
@ ARG_ERR
参数错误 | Argument error
I2C 设备的配置信息结构体。 Configuration structure for an I2C device.
uint32_t clock_speed
I2C 通信时钟速率(单位:Hz)。 The I2C clock speed (in Hz).