30 static constexpr int PIN_NO_CHANGE = -1;
32 ESP32UART(uart_port_t uart_num,
int tx_pin,
int rx_pin,
33 int rts_pin = PIN_NO_CHANGE,
int cts_pin = PIN_NO_CHANGE,
34 size_t rx_buffer_size = 1024,
size_t tx_buffer_size = 512,
35 uint32_t tx_queue_size = 5,
37 bool enable_dma =
true);
49 static uint8_t* AllocateTxStorage(
size_t size);
52 static ErrorCode ResolveUartPeriph(uart_port_t uart_num, periph_module_t& out);
54 static bool ResolveWordLength(uint8_t data_bits, uart_word_length_t& out);
56 static bool ResolveStopBits(uint8_t stop_bits, uart_stop_bits_t& out);
60 static void UartIsrEntry(
void* arg);
62#if SOC_GDMA_SUPPORTED && SOC_UHCI_SUPPORTED
63 static bool DmaTxEofCallback(gdma_channel_handle_t dma_chan,
64 gdma_event_data_t* event_data,
67 static bool DmaTxDescrErrCallback(gdma_channel_handle_t dma_chan,
68 gdma_event_data_t* event_data,
71 static bool DmaRxDoneCallback(gdma_channel_handle_t dma_chan,
72 gdma_event_data_t* event_data,
75 static bool DmaRxDescrErrCallback(gdma_channel_handle_t dma_chan,
76 gdma_event_data_t* event_data,
88 void ConfigureRxInterruptPath();
90#if SOC_GDMA_SUPPORTED && SOC_UHCI_SUPPORTED
96 void HandleDmaRxDone(gdma_event_data_t* event_data);
98 void HandleDmaRxError();
100 void HandleDmaTxError();
102 void PushDmaRxData(
size_t recv_size,
bool in_isr);
107 bool LoadActiveTxFromQueue(
bool in_isr);
109 bool LoadPendingTxFromQueue(
bool in_isr);
111 bool DequeueTxToBuffer(uint8_t* buffer,
size_t& size,
WriteInfoBlock& info,
114 bool StartActiveTransfer(
bool in_isr);
115 bool StartAndReportActive(
bool in_isr);
116 void ClearActiveTx();
117 void ClearPendingTx();
119 void FillTxFifo(
bool in_isr);
121 void PushRxBytes(
const uint8_t* data,
size_t size,
bool in_isr);
123 void DrainRxFifoFromIsr();
125 void HandleRxInterrupt(uint32_t uart_intr_status);
127 void HandleTxInterrupt(uint32_t uart_intr_status);
129 void HandleUartInterrupt();
131 void OnTxTransferDone(
bool in_isr,
ErrorCode result);
133 uart_port_t uart_num_;
141 uint8_t* rx_isr_buffer_ =
nullptr;
142 size_t rx_isr_buffer_size_ = 0;
144 uint8_t* tx_storage_ =
nullptr;
145 size_t tx_storage_size_ = 0;
146 size_t tx_buffer_size_ = 0;
147 uint8_t* tx_active_buffer_ =
nullptr;
148 uint8_t* tx_pending_buffer_ =
nullptr;
149 size_t tx_active_length_ = 0;
150 size_t tx_pending_length_ = 0;
151 size_t tx_active_offset_ = 0;
157 bool tx_active_valid_ =
false;
158 bool tx_pending_valid_ =
false;
160 bool uart_hw_enabled_ =
false;
161 uart_hal_context_t uart_hal_ = {};
162 intr_handle_t uart_intr_handle_ =
nullptr;
163 bool uart_isr_installed_ =
false;
164 bool dma_requested_ =
true;
169#if SOC_GDMA_SUPPORTED && SOC_UHCI_SUPPORTED
170 bool dma_backend_enabled_ =
false;
171 uhci_hal_context_t uhci_hal_ = {};
172 gdma_channel_handle_t tx_dma_channel_ =
nullptr;
173 gdma_channel_handle_t rx_dma_channel_ =
nullptr;
174 gdma_link_list_handle_t tx_dma_links_[2] = {
nullptr,
nullptr};
175 uintptr_t tx_dma_head_addr_[2] = {0U, 0U};
176 uint8_t* tx_dma_buffer_addr_[2] = {
nullptr,
nullptr};
177 gdma_link_list_handle_t rx_dma_link_ =
nullptr;
178 size_t tx_dma_alignment_ = 1;
179 size_t rx_dma_alignment_ = 1;
180 uint8_t* rx_dma_storage_ =
nullptr;
181 size_t rx_dma_chunk_size_ = 0;
182 uint32_t rx_dma_node_count_ = 0;
183 uint32_t rx_dma_node_index_ = 0;