libxr  1.0
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stm32_spi.hpp
1#pragma once
2
3#include "main.h"
4
5#ifdef HAL_SPI_MODULE_ENABLED
6
7#ifdef SPI
8#undef SPI
9#endif
10
11#include "libxr_def.hpp"
12#include "libxr_rw.hpp"
13#include "spi.hpp"
14
15typedef enum
16{
17#ifdef SPI1
18 STM32_SPI1,
19#endif
20#ifdef SPI2
21 STM32_SPI2,
22#endif
23#ifdef SPI3
24 STM32_SPI3,
25#endif
26#ifdef SPI4
27 STM32_SPI4,
28#endif
29#ifdef SPI5
30 STM32_SPI5,
31#endif
32#ifdef SPI6
33 STM32_SPI6,
34#endif
35#ifdef SPI7
36 STM32_SPI7,
37#endif
38#ifdef SPI8
39 STM32_SPI8,
40#endif
41 STM32_SPI_NUMBER,
42 STM32_SPI_ID_ERROR
43} stm32_spi_id_t;
44
45stm32_spi_id_t STM32_SPI_GetID(SPI_TypeDef *addr); // NOLINT
46
47namespace LibXR
48{
49class STM32SPI : public SPI
50{
51 public:
52 STM32SPI(SPI_HandleTypeDef *spi_handle, RawData dma_buff_rx, RawData dma_buff_tx,
53 uint32_t dma_enable_min_size = 3)
54 : SPI(),
55 dma_buff_rx_(dma_buff_rx),
56 dma_buff_tx_(dma_buff_tx),
57 spi_handle_(spi_handle),
58 id_(STM32_SPI_GetID(spi_handle_->Instance)),
59 dma_enable_min_size_(dma_enable_min_size)
60 {
61 ASSERT(id_ != STM32_SPI_ID_ERROR);
62
63 map[id_] = this;
64 }
65
66 ErrorCode ReadAndWrite(RawData read_data, ConstRawData write_data,
67 OperationRW &op) override
68 {
69 uint32_t need_write = max(write_data.size_, read_data.size_);
70 ASSERT(need_write <= dma_buff_rx_.size_ && need_write <= dma_buff_tx_.size_);
71
72 if (spi_handle_->State != HAL_SPI_STATE_READY)
73 {
74 return ErrorCode::BUSY;
75 }
76
77 mem_read_ = false;
78
79 if (need_write > dma_enable_min_size_)
80 {
81 memcpy(dma_buff_tx_.addr_, write_data.addr_, need_write);
82 memset(dma_buff_rx_.addr_, 0, need_write);
83 rw_op_ = op;
84 read_buff_ = read_data;
85
86#if __DCACHE_PRESENT
87 if (write_data.size_ > 0)
88 {
89 SCB_CleanDCache_by_Addr(static_cast<uint32_t *>(dma_buff_tx_.addr_),
90 write_data.size_);
91 }
92#endif
93
94 HAL_SPI_TransmitReceive_DMA(spi_handle_, static_cast<uint8_t *>(dma_buff_tx_.addr_),
95 static_cast<uint8_t *>(dma_buff_rx_.addr_), need_write);
96
97 op.MarkAsRunning();
98 if (op.type == OperationRW::OperationType::BLOCK)
99 {
100 return op.data.sem_info.sem->Wait(op.data.sem_info.timeout);
101 }
102 return ErrorCode::OK;
103 }
104 else
105 {
106 memcpy(dma_buff_tx_.addr_, write_data.addr_, write_data.size_);
107 memset(dma_buff_rx_.addr_, 0, write_data.size_);
108 ErrorCode ans =
109 HAL_SPI_TransmitReceive(spi_handle_, static_cast<uint8_t *>(dma_buff_tx_.addr_),
110 static_cast<uint8_t *>(dma_buff_rx_.addr_), need_write,
111 20) == HAL_OK
112 ? ErrorCode::OK
113 : ErrorCode::BUSY;
114
115 memcpy(read_data.addr_, dma_buff_rx_.addr_, read_data.size_);
116
117 op.UpdateStatus(false, std::forward<ErrorCode>(ans));
118
119 if (op.type == OperationRW::OperationType::BLOCK)
120 {
121 return op.data.sem_info.sem->Wait(op.data.sem_info.timeout);
122 }
123
124 return ans;
125 }
126 }
127
128 ErrorCode SetConfig(SPI::Configuration config) override
129 {
130 switch (config.clock_polarity)
131 {
132 case SPI::ClockPolarity::LOW:
133 spi_handle_->Init.CLKPolarity = SPI_POLARITY_LOW;
134 break;
135 case SPI::ClockPolarity::HIGH:
136 spi_handle_->Init.CLKPolarity = SPI_POLARITY_HIGH;
137 break;
138 }
139
140 switch (config.clock_phase)
141 {
142 case SPI::ClockPhase::EDGE_1:
143 spi_handle_->Init.CLKPhase = SPI_PHASE_1EDGE;
144 break;
145 case SPI::ClockPhase::EDGE_2:
146 spi_handle_->Init.CLKPhase = SPI_PHASE_2EDGE;
147 break;
148 }
149
150 return HAL_SPI_Init(spi_handle_) == HAL_OK ? ErrorCode::OK : ErrorCode::BUSY;
151 }
152
153 ErrorCode MemRead(uint16_t reg, RawData read_data, OperationRW &op) override
154 {
155 uint32_t need_read = read_data.size_;
156
157 if (spi_handle_->State != HAL_SPI_STATE_READY)
158 {
159 return ErrorCode::BUSY;
160 }
161
162 mem_read_ = false;
163
164 uint8_t *dma_buffer_rx = reinterpret_cast<uint8_t *>(dma_buff_rx_.addr_);
165 uint8_t *dma_buffer_tx = reinterpret_cast<uint8_t *>(dma_buff_tx_.addr_);
166
167 if (need_read + 1 > dma_enable_min_size_)
168 {
169 memset(dma_buff_rx_.addr_, 0, need_read + 1);
170 memset(dma_buff_tx_.addr_, 0, need_read + 1);
171 dma_buffer_tx[0] = reg | 0x80;
172 rw_op_ = op;
173 read_buff_ = read_data;
174
175 mem_read_ = true;
176
177 HAL_SPI_TransmitReceive_DMA(spi_handle_, static_cast<uint8_t *>(dma_buff_tx_.addr_),
178 static_cast<uint8_t *>(dma_buff_rx_.addr_),
179 need_read + 1);
180
181 op.MarkAsRunning();
182 if (op.type == OperationRW::OperationType::BLOCK)
183 {
184 return op.data.sem_info.sem->Wait(op.data.sem_info.timeout);
185 }
186 return ErrorCode::OK;
187 }
188 else
189 {
190 memset(dma_buff_rx_.addr_, 0, need_read + 1);
191 memset(dma_buff_tx_.addr_, 0, need_read + 1);
192 dma_buffer_tx[0] = reg | 0x80;
193 ErrorCode ans =
194 HAL_SPI_TransmitReceive(spi_handle_, static_cast<uint8_t *>(dma_buff_tx_.addr_),
195 static_cast<uint8_t *>(dma_buff_rx_.addr_),
196 need_read + 1, 20) == HAL_OK
197 ? ErrorCode::OK
198 : ErrorCode::BUSY;
199
200 memcpy(read_data.addr_, dma_buffer_rx + 1, read_data.size_);
201
202 op.UpdateStatus(false, std::forward<ErrorCode>(ans));
203
204 if (op.type == OperationRW::OperationType::BLOCK)
205 {
206 return op.data.sem_info.sem->Wait(op.data.sem_info.timeout);
207 }
208
209 return ans;
210 }
211 }
212
213 ErrorCode MemWrite(uint16_t reg, ConstRawData write_data, OperationRW &op) override
214 {
215 uint32_t need_write = write_data.size_;
216
217 if (spi_handle_->State != HAL_SPI_STATE_READY)
218 {
219 return ErrorCode::BUSY;
220 }
221
222 mem_read_ = false;
223
224 uint8_t *dma_buffer_tx = reinterpret_cast<uint8_t *>(dma_buff_tx_.addr_);
225
226 if (need_write + 1 > dma_enable_min_size_)
227 {
228 memcpy(dma_buffer_tx + 1, write_data.addr_, need_write);
229 *dma_buffer_tx = reg & 0x7f;
230
231 rw_op_ = op;
232 read_buff_ = {nullptr, 0};
233
234 HAL_SPI_TransmitReceive_DMA(spi_handle_, static_cast<uint8_t *>(dma_buff_tx_.addr_),
235 static_cast<uint8_t *>(dma_buff_rx_.addr_),
236 need_write + 1);
237
238 op.MarkAsRunning();
239 if (op.type == OperationRW::OperationType::BLOCK)
240 {
241 return op.data.sem_info.sem->Wait(op.data.sem_info.timeout);
242 }
243 return ErrorCode::OK;
244 }
245 else
246 {
247 memcpy(dma_buffer_tx + 1, write_data.addr_, need_write);
248 *dma_buffer_tx = reg & 0x7f;
249 ErrorCode ans =
250 HAL_SPI_TransmitReceive(spi_handle_, static_cast<uint8_t *>(dma_buff_tx_.addr_),
251 static_cast<uint8_t *>(dma_buff_rx_.addr_),
252 need_write + 1, 20) == HAL_OK
253 ? ErrorCode::OK
254 : ErrorCode::BUSY;
255
256 op.UpdateStatus(false, std::forward<ErrorCode>(ans));
257
258 if (op.type == OperationRW::OperationType::BLOCK)
259 {
260 return op.data.sem_info.sem->Wait(op.data.sem_info.timeout);
261 }
262
263 return ans;
264 }
265 }
266
267 RawData dma_buff_rx_, dma_buff_tx_;
268
269 SPI_HandleTypeDef *spi_handle_;
270
271 stm32_spi_id_t id_ = STM32_SPI_ID_ERROR;
272
273 uint32_t dma_enable_min_size_ = 3;
274
275 OperationRW rw_op_;
276
277 RawData read_buff_;
278
279 bool mem_read_ = false;
280
281 static STM32SPI *map[STM32_SPI_NUMBER]; // NOLINT
282};
283
284} // namespace LibXR
285
286#endif
LibXR::ConstRawData
常量原始数据封装类。 A class for encapsulating constant raw data.
Definition libxr_type.hpp:128
LibXR::ConstRawData::size_
size_t size_
数据大小（字节）。 The size of the data (in bytes).
Definition libxr_type.hpp:215
LibXR::ConstRawData::addr_
const void * addr_
数据存储地址（常量）。 The storage address of the data (constant).
Definition libxr_type.hpp:214
LibXR::Operation::MarkAsRunning
void MarkAsRunning()
标记操作为运行状态。 Marks the operation as running.
Definition libxr_rw.hpp:204
LibXR::Operation::UpdateStatus
void UpdateStatus(bool in_isr, Status &&...status)
Updates operation status based on type.
Definition libxr_rw.hpp:173
LibXR::Operation::data
union LibXR::Operation::@4 data
LibXR::Operation::type
OperationType type
Definition libxr_rw.hpp:227
LibXR::RawData
原始数据封装类。 A class for encapsulating raw data.
Definition libxr_type.hpp:21
LibXR::RawData::size_
size_t size_
数据大小（字节）。 The size of the data (in bytes).
Definition libxr_type.hpp:115
LibXR::RawData::addr_
void * addr_
数据存储地址。 The storage address of the data.
Definition libxr_type.hpp:114
LibXR::SPI
串行外设接口（SPI）抽象类。Abstract class for Serial Peripheral Interface (SPI).
Definition spi.hpp:13
LibXR::SPI::ClockPhase::EDGE_2
@ EDGE_2
在第二个时钟边沿采样数据。Data sampled on the second clock edge.
LibXR::SPI::ClockPhase::EDGE_1
@ EDGE_1
在第一个时钟边沿采样数据。Data sampled on the first clock edge.
LibXR::SPI::OperationRW
WriteOperation OperationRW
定义读写操作类型的别名。Defines an alias for the read/write operation type.
Definition spi.hpp:39
LibXR::SPI::SPI
SPI()
默认构造函数。Default constructor.
Definition spi.hpp:66
LibXR::SPI::ClockPolarity::LOW
@ LOW
时钟空闲时为低电平。Clock idle low.
LibXR::SPI::ClockPolarity::HIGH
@ HIGH
时钟空闲时为高电平。Clock idle high.
LibXR::STM32SPI::MemRead
ErrorCode MemRead(uint16_t reg, RawData read_data, OperationRW &op) override
从 SPI 设备的寄存器读取数据。 Reads data from a specific register of the SPI device.
Definition stm32_spi.hpp:153
LibXR::STM32SPI::ReadAndWrite
ErrorCode ReadAndWrite(RawData read_data, ConstRawData write_data, OperationRW &op) override
进行 SPI 读写操作。Performs SPI read and write operations.
Definition stm32_spi.hpp:66
LibXR::STM32SPI::SetConfig
ErrorCode SetConfig(SPI::Configuration config) override
设置 SPI 配置参数。Sets SPI configuration parameters.
Definition stm32_spi.hpp:128
LibXR::STM32SPI::MemWrite
ErrorCode MemWrite(uint16_t reg, ConstRawData write_data, OperationRW &op) override
向 SPI 设备的寄存器写入数据。 Writes data to a specific register of the SPI device.
Definition stm32_spi.hpp:213
LibXR::Semaphore::Wait
ErrorCode Wait(uint32_t timeout=UINT32_MAX)
等待（减少）信号量 Waits (decrements) the semaphore
Definition semaphore.cpp:25
LibXR
LibXR 命名空间
Definition ch32_gpio.hpp:9
LibXR::max
constexpr auto max(T1 a, T2 b) -> typename std::common_type< T1, T2 >::type
计算两个数的最大值
Definition libxr_def.hpp:150
LibXR::SPI::Configuration
存储 SPI 配置参数的结构体。Structure for storing SPI configuration parameters.
Definition spi.hpp:46
LibXR::SPI::Configuration::clock_phase
ClockPhase clock_phase
SPI 时钟相位。SPI clock phase.
Definition spi.hpp:48
LibXR::SPI::Configuration::clock_polarity
ClockPolarity clock_polarity
SPI 时钟极性。SPI clock polarity.
Definition spi.hpp:47