cdc_uart.hpp

#pragma once
 
#include "cdc_base.hpp"
#include "ep.hpp"
#include "flag.hpp"
#include "libxr_def.hpp"
#include "libxr_rw.hpp"
 
namespace LibXR
{
class CDCUartTxOpDequeueHelper final
{
 public:
  explicit CDCUartTxOpDequeueHelper(WritePort& port) : port_(port) {}
 
  void Reset()
  {
    head_valid_ = false;
    offset_ = 0;
  }
 
  bool HasOp() { return head_valid_ || (port_.queue_info_->Size() > 0); }
 
  ErrorCode Take(uint8_t* dst, std::size_t cap, std::size_t& out_len)
  {
    auto ec = EnsureHead();
    if (ec != ErrorCode::OK)
    {
      out_len = 0;
      return ec;  // EMPTY / FAILED
    }
 
    const std::size_t REMAINING = Remaining();
    if (REMAINING == 0)
    {
      out_len = 0;
      return ErrorCode::FAILED;
    }
 
    const std::size_t TAKE = (REMAINING < cap) ? REMAINING : cap;
 
    if (port_.queue_data_->PopBatch(dst, TAKE) != ErrorCode::OK)
    {
      out_len = 0;
      return ErrorCode::FAILED;
    }
 
    offset_ += TAKE;
    out_len = TAKE;
 
    return (offset_ == head_.data.size_) ? ErrorCode::OK : ErrorCode::PENDING;
  }
 
  bool HeadCompleted() const { return head_valid_ && (offset_ == head_.data.size_); }
 
  ErrorCode PopCompleted(WriteInfoBlock* completed_info = nullptr)
  {
    if (!HeadCompleted())
    {
      return ErrorCode::FAILED;
    }
 
    WriteInfoBlock popped{};
    auto ans = port_.queue_info_->Pop(popped);
    ASSERT(ans == ErrorCode::OK);
 
    if (completed_info)
    {
      *completed_info = popped;
    }
 
    Reset();
    return ErrorCode::OK;
  }
 
 private:
  ErrorCode EnsureHead()
  {
    if (head_valid_)
    {
      return ErrorCode::OK;
    }
 
    WriteInfoBlock info{};
    if (port_.queue_info_->Peek(info) != ErrorCode::OK)
    {
      return ErrorCode::EMPTY;
    }
 
    head_ = info;
    head_valid_ = true;
    offset_ = 0;
    return ErrorCode::OK;
  }
 
  std::size_t Remaining() const
  {
    ASSERT(head_valid_);
    ASSERT(head_.data.size_ >= offset_);
    return head_.data.size_ - offset_;
  }
 
 private:
  WritePort& port_;          
  bool head_valid_ = false;  
  WriteInfoBlock head_{};    
  std::size_t offset_ = 0;   
};
 
}  // namespace LibXR
 
namespace LibXR::USB
{
 
class CDCUart;
 
class CDCUartReadPort : public ReadPort
{
 public:
  explicit CDCUartReadPort(uint32_t size, CDCUart& owner) : ReadPort(size), owner_(owner)
  {
  }
 
  void OnRxDequeue(bool in_isr) override;
 
  CDCUartReadPort& operator=(ReadFun fun)
  {
    ReadPort::operator=(fun);
    return *this;
  }
 
  CDCUart& owner_;  
 
  bool recv_pause_ =
      false;  
  ConstRawData pending_data_{
      nullptr,
      0};  
};
 
class CDCUart : public CDCBase, public LibXR::UART
{
 public:
  using LibXR::UART::Read;
  using LibXR::UART::read_port_;
  using LibXR::UART::Write;
  using LibXR::UART::write_port_;
 
  CDCUart(
      size_t rx_buffer_size = 128, size_t tx_buffer_size = 128, size_t tx_queue_size = 5,
      Endpoint::EPNumber data_in_ep_num = Endpoint::EPNumber::EP_AUTO,
      Endpoint::EPNumber data_out_ep_num = Endpoint::EPNumber::EP_AUTO,
      Endpoint::EPNumber comm_ep_num = Endpoint::EPNumber::EP_AUTO,
      const char* control_interface_string = CDCBase::DEFAULT_CONTROL_INTERFACE_STRING,
      const char* data_interface_string = CDCBase::DEFAULT_DATA_INTERFACE_STRING)
      : CDCBase(data_in_ep_num, data_out_ep_num, comm_ep_num, control_interface_string,
                data_interface_string),
        LibXR::UART(&read_port_cdc_, &write_port_cdc_),
        read_port_cdc_(rx_buffer_size, *this),
        write_port_cdc_(tx_queue_size, tx_buffer_size),
        tx_deq_(write_port_cdc_)
  {
    read_port_cdc_ = ReadFun;    // NOLINT
    write_port_cdc_ = WriteFun;  // NOLINT
  }
 
  ErrorCode SetConfig(UART::Configuration cfg) override
  {
    auto& line_coding = GetLineCoding();
 
    switch (cfg.stop_bits)
    {
      case 1:
        line_coding.bCharFormat = 0;
        break;
      case 2:
        line_coding.bCharFormat = 2;
        break;
      default:
        return ErrorCode::ARG_ERR;
    }
 
    switch (cfg.parity)
    {
      case UART::Parity::NO_PARITY:
        line_coding.bParityType = 0;
        break;
      case UART::Parity::ODD:
        line_coding.bParityType = 1;
        break;
      case UART::Parity::EVEN:
        line_coding.bParityType = 2;
        break;
      default:
        return ErrorCode::ARG_ERR;
    }
 
    switch (cfg.data_bits)
    {
      case 5:
      case 6:
      case 7:
      case 8:
      case 16:
        line_coding.bDataBits = static_cast<uint8_t>(cfg.data_bits);
        break;
      default:
        return ErrorCode::ARG_ERR;
    }
 
    line_coding.dwDTERate = cfg.baudrate;
    SendSerialState();
    return ErrorCode::OK;
  }
 
  bool TryRearmOut(bool in_isr)
  {
    auto ep_data_out = GetDataOutEndpoint();
    if (ep_data_out == nullptr)
    {
      return false;
    }
 
    const std::size_t MPS = ep_data_out->MaxPacketSize();
    if (MPS == 0 || read_port_cdc_.queue_data_ == nullptr)
    {
      return false;
    }
 
    if (read_port_cdc_.recv_pause_)
    {
      if (read_port_cdc_.queue_data_->EmptySize() >= read_port_cdc_.pending_data_.size_)
      {
        auto push_ans = read_port_cdc_.queue_data_->PushBatch(
            reinterpret_cast<const uint8_t*>(read_port_cdc_.pending_data_.addr_),
            read_port_cdc_.pending_data_.size_);
        if (push_ans == ErrorCode::OK)
        {
          read_port_cdc_.ProcessPendingReads(in_isr);
        }
        else
        {
          return false;
        }
      }
      else
      {
        return false;
      }
    }
 
    if (ep_data_out->GetState() == Endpoint::State::BUSY)
    {
      return false;
    }
 
    auto ans = ep_data_out->Transfer(MPS);
    if (ans == ErrorCode::OK)
    {
      read_port_cdc_.recv_pause_ = false;
      return true;
    }
 
    return false;
  }
 
 protected:
  void UnbindEndpoints(EndpointPool& endpoint_pool, bool in_isr) override
  {
    CDCBase::UnbindEndpoints(endpoint_pool, in_isr);
 
    WriteInfoBlock info{};
 
    write_port_cdc_.queue_data_->Reset();
    tx_deq_.Reset();
 
    while (write_port_cdc_.queue_info_->Pop(info) == ErrorCode::OK)
    {
      write_port_cdc_.Finish(in_isr, ErrorCode::INIT_ERR, info);
    }
 
    need_write_zlp_ = false;
 
    read_port_cdc_.recv_pause_ = false;
    read_port_cdc_.pending_data_ = {nullptr, 0};
 
    write_port_cdc_.Reset();
  }
 
  static ErrorCode WriteFun(WritePort& port, bool in_isr)
  {
    UNUSED(in_isr);
 
    auto* cdc = LibXR::ContainerOf(&port, &CDCUart::write_port_cdc_);
 
    if (cdc->in_write_isr_.IsSet())
    {
      return ErrorCode::PENDING;
    }
 
    auto ep = cdc->GetDataInEndpoint();
    if (ep == nullptr)
    {
      return ErrorCode::FAILED;
    }
 
    if (!cdc->Inited())
    {
      WriteInfoBlock info{};
      auto pop_ans = port.queue_info_->Pop(info);
      if (pop_ans != ErrorCode::OK)
      {
        return ErrorCode::EMPTY;
      }
 
      auto drop_ans = port.queue_data_->PopBatch(nullptr, info.data.size_);
      UNUSED(drop_ans);
      ASSERT(drop_ans == ErrorCode::OK);
 
      return ErrorCode::INIT_ERR;  // 非 PENDING -> 上层 finish 一次 / Non-PENDING
                                   // triggers one finish upstream
    }
 
    if (ep->GetActiveLength() != 0)
    {
      return ErrorCode::PENDING;
    }
 
    if (cdc->tx_deq_.HasOp())
    {
      cdc->need_write_zlp_ = false;
    }
 
    ErrorCode slot_ec = ErrorCode::PENDING;
 
    // 预写第一段 / Prefill first segment
    {
      auto buffer = ep->GetBuffer();
      std::size_t len = 0;
 
      slot_ec =
          cdc->tx_deq_.Take(reinterpret_cast<uint8_t*>(buffer.addr_), buffer.size_, len);
      if (slot_ec == ErrorCode::EMPTY || len == 0)
      {
        return ErrorCode::PENDING;
      }
      if (slot_ec != ErrorCode::OK && slot_ec != ErrorCode::PENDING)
      {
        return slot_ec;
      }
 
      ep->SetActiveLength(len);
    }
 
    std::atomic_signal_fence(std::memory_order_seq_cst);
 
    // 循环：可立即发送则发送；发送后预写下一段并继续检查 / Loop: send if possible; then
    // prefill next segment
    while (true)
    {
      const std::size_t TO_SEND = ep->GetActiveLength();
 
      if (ep->GetState() != Endpoint::State::IDLE || TO_SEND == 0 ||
          !cdc->tx_deq_.HasOp())
      {
        return ErrorCode::PENDING;
      }
 
      std::atomic_signal_fence(std::memory_order_seq_cst);
 
      // 启动一次 Transfer / Kick one Transfer
      ep->SetActiveLength(0);
      auto ans = ep->Transfer(TO_SEND);
      ASSERT(ans == ErrorCode::OK);
 
      if (slot_ec == ErrorCode::OK && cdc->tx_deq_.HeadCompleted())
      {
        auto pop_ok = cdc->tx_deq_.PopCompleted(nullptr);
        ASSERT(pop_ok == ErrorCode::OK);
 
        // ZLP 判定。
        // ZLP decision.
        const std::size_t MPS = ep->MaxPacketSize();
        if (MPS > 0 && (TO_SEND % MPS) == 0 && ep->GetActiveLength() == 0 &&
            !cdc->tx_deq_.HasOp())
        {
          cdc->need_write_zlp_ = true;
        }
 
        return ErrorCode::OK;  // 非 PENDING -> 上层完成一次 / Non-PENDING triggers one upstream finish
      }
 
      // 预写下一段。
      // Prefill the next segment.
      if (!cdc->tx_deq_.HasOp())
      {
        return ErrorCode::PENDING;
      }
 
      auto buffer = ep->GetBuffer();
      std::size_t len2 = 0;
 
      slot_ec =
          cdc->tx_deq_.Take(reinterpret_cast<uint8_t*>(buffer.addr_), buffer.size_, len2);
      if (slot_ec == ErrorCode::EMPTY || len2 == 0)
      {
        return ErrorCode::PENDING;
      }
      if (slot_ec != ErrorCode::OK && slot_ec != ErrorCode::PENDING)
      {
        return slot_ec;
      }
 
      ep->SetActiveLength(len2);
      // 下一轮继续检查是否可立即发送。
      // The next iteration checks whether sending can continue immediately.
    }
  }
 
  static ErrorCode ReadFun(ReadPort&, bool) { return ErrorCode::PENDING; }
 
  void OnDataOutComplete(bool in_isr, ConstRawData& data) override
  {
    if (data.size_ > 0)
    {
      auto push_ans = read_port_cdc_.queue_data_->PushBatch(
          reinterpret_cast<const uint8_t*>(data.addr_), data.size_);
      if (push_ans == ErrorCode::OK)
      {
        read_port_cdc_.ProcessPendingReads(in_isr);
      }
      else
      {
        read_port_cdc_.recv_pause_ = true;
        read_port_cdc_.pending_data_ = data;
        return;
      }
    }
 
    (void)TryRearmOut(in_isr);
  }
 
  void OnDataInComplete(bool in_isr, ConstRawData& data) override
  {
    UNUSED(data);
 
    Flag::ScopedRestore isr_flag(in_write_isr_);
 
    auto ep = GetDataInEndpoint();
    if (ep == nullptr)
    {
      return;
    }
 
    if (!Inited())
    {
      WriteInfoBlock info{};
      tx_deq_.Reset();
 
      while (write_port_cdc_.queue_info_->Pop(info) == ErrorCode::OK)
      {
        write_port_cdc_.queue_data_->Reset();
        ASSERT(write_port_cdc_.queue_data_->Size() == 0);
        write_port_cdc_.Finish(in_isr, ErrorCode::INIT_ERR, info);
      }
      return;
    }
 
    // ZLP：仅在此刻跨-op 无数据时发送。
    // Send the ZLP only when there is no data left across ops at this moment.
    if (need_write_zlp_)
    {
      if (ep->GetActiveLength() == 0 && !tx_deq_.HasOp())
      {
        auto z = ep->TransferZLP();
        ASSERT(z == ErrorCode::OK);
        need_write_zlp_ = false;
        return;
      }
      need_write_zlp_ = false;
    }
 
    // ActiveLength==0 时不读取队列。
    // Do not read queues when ActiveLength==0.
    const std::size_t PENDING_LEN = ep->GetActiveLength();
    if (PENDING_LEN == 0)
    {
      return;
    }
 
    // 1) 续发：本 ISR 仅启动一次 Transfer。
    // 1) Continue: kick only one Transfer in this ISR.
    ep->SetActiveLength(0);
    auto ans = ep->Transfer(PENDING_LEN);
    ASSERT(ans == ErrorCode::OK);
 
    // 2) 若为 head op 最后一段：启动后 pop + Finish 一次。
    // 2) If this is the last segment of the head op, pop + Finish once after kick-off.
    if (tx_deq_.HeadCompleted())
    {
      WriteInfoBlock completed{};
      auto pop_ok = tx_deq_.PopCompleted(&completed);
      ASSERT(pop_ok == ErrorCode::OK);
      write_port_cdc_.Finish(in_isr, ErrorCode::OK, completed);
    }
 
    // 3) 预写：仅在已启动 Transfer 后允许读取队列。
    // 3) Prefill: queue reads are allowed only after a Transfer has been kicked.
    bool primed = false;
    if (tx_deq_.HasOp())
    {
      auto buffer = ep->GetBuffer();
      std::size_t len2 = 0;
 
      auto ec2 =
          tx_deq_.Take(reinterpret_cast<uint8_t*>(buffer.addr_), buffer.size_, len2);
      if ((ec2 == ErrorCode::OK || ec2 == ErrorCode::PENDING) && len2 > 0)
      {
        ep->SetActiveLength(len2);
        primed = true;
      }
    }
 
    // 4) ZLP 判定 / ZLP decision
    const std::size_t MPS = ep->MaxPacketSize();
    if (!primed && PENDING_LEN > 0 && MPS > 0 && (PENDING_LEN % MPS) == 0 &&
        ep->GetActiveLength() == 0 && !tx_deq_.HasOp())
    {
      need_write_zlp_ = true;
    }
  }
 
 private:
  CDCUartReadPort read_port_cdc_;    
  LibXR::WritePort write_port_cdc_;  
 
  LibXR::CDCUartTxOpDequeueHelper tx_deq_;  
 
  Flag::Plain in_write_isr_;  
 
  bool need_write_zlp_{false};  
};
 
inline void CDCUartReadPort::OnRxDequeue(bool in_isr)
{
  if (!recv_pause_)
  {
    return;
  }
 
  // pending_data_ 回填 / Push pending_data_ back into queue
  if (pending_data_.size_ > 0)
  {
    if (queue_data_->EmptySize() >= pending_data_.size_)
    {
      auto ans = queue_data_->PushBatch(
          reinterpret_cast<const uint8_t*>(pending_data_.addr_), pending_data_.size_);
      if (ans == ErrorCode::OK)
      {
        pending_data_ = {nullptr, 0};
        ProcessPendingReads(in_isr);
      }
      else
      {
        return;
      }
    }
    else
    {
      return;
    }
  }
 
  // 尝试恢复 rearm / Try to rearm OUT
  (void)owner_.TryRearmOut(in_isr);
}
 
}  // namespace LibXR::USB