LibXR::CH32UART Class Reference

Inheritance diagram for LibXR::CH32UART:

Collaboration diagram for LibXR::CH32UART:

Public Member Functions
	CH32UART (ch32_uart_id_t id, RawData dma_rx, RawData dma_tx, GPIO_TypeDef *tx_gpio_port, uint16_t tx_gpio_pin, GPIO_TypeDef *rx_gpio_port, uint16_t rx_gpio_pin, uint32_t pin_remap=0, uint32_t tx_queue_size=5, UART::Configuration config={115200, UART::Parity::NO_PARITY, 8, 1})
ErrorCode	SetConfig (UART::Configuration config)
	设置 UART 配置 / Sets the UART configuration
Public Member Functions inherited from LibXR::UART
template<typename ReadPortType = ReadPort, typename WritePortType = WritePort>
	UART (ReadPortType *read_port, WritePortType *write_port)
	UART 构造函数 / UART constructor.
template<typename OperationType , typename = std::enable_if_t<std::is_base_of_v< WriteOperation, std::decay_t<OperationType>>>>
ErrorCode	Write (ConstRawData data, OperationType &&op)
template<typename OperationType , typename = std::enable_if_t<std::is_base_of_v< ReadOperation, std::decay_t<OperationType>>>>
ErrorCode	Read (RawData data, OperationType &&op)

Static Public Member Functions
static ErrorCode	WriteFun (WritePort &port)
static ErrorCode	ReadFun (ReadPort &port)
static void	TxDmaIRQHandler (DMA_Channel_TypeDef *channel, ch32_uart_id_t id)
static void	RxDmaIRQHandler (DMA_Channel_TypeDef *channel, ch32_uart_id_t id)

Data Fields
ch32_uart_id_t	id_
uint16_t	uart_mode_
ReadPort	_read_port
WritePort	_write_port
RawData	dma_buff_rx_
DoubleBuffer	dma_buff_tx_
WriteInfoBlock	write_info_active_
size_t	last_rx_pos_ = 0
USART_TypeDef *	instance_
DMA_Channel_TypeDef *	dma_rx_channel_
DMA_Channel_TypeDef *	dma_tx_channel_
Data Fields inherited from LibXR::UART
ReadPort *	read_port_
	读取端口 / Read port
WritePort *	write_port_
	写入端口 / Write port

Static Public Attributes
static CH32UART *	map [CH32_UART_NUMBER] = {nullptr}

Additional Inherited Members
Public Types inherited from LibXR::UART
enum class	Parity : uint8_t { NO_PARITY = 0 , EVEN = 1 , ODD = 2 }
	奇偶校验模式 / Parity mode More...

Detailed Description

Definition at line 16 of file ch32_uart.hpp.

Constructor & Destructor Documentation

CH32UART()

CH32UART::CH32UART	(	ch32_uart_id_t	id,
		RawData	dma_rx,
		RawData	dma_tx,
		GPIO_TypeDef *	tx_gpio_port,
		uint16_t	tx_gpio_pin,
		GPIO_TypeDef *	rx_gpio_port,
		uint16_t	rx_gpio_pin,
		uint32_t	pin_remap = 0,
		uint32_t	tx_queue_size = 5,
		UART::Configuration	config = {115200, UART::Parity::NO_PARITY, 8, 1} )

Definition at line 14 of file ch32_uart.cpp.

    : UART(&_read_port, &_write_port),
      id_(id),
      _read_port(dma_rx.size_),
      _write_port(tx_queue_size, dma_tx.size_ / 2),
      dma_buff_rx_(dma_rx),
      dma_buff_tx_(dma_tx),
      instance_(CH32_UART_GetInstanceID(id)),
      dma_rx_channel_(CH32_UART_RX_DMA_CHANNEL_MAP[id]),
      dma_tx_channel_(CH32_UART_TX_DMA_CHANNEL_MAP[id])
{
  map[id] = this;
 
  bool tx_enable = dma_tx.size_ > 1;
  bool rx_enable = dma_rx.size_ > 0;
 
  ASSERT(tx_enable || rx_enable);
 
  /* GPIO配置（TX: 推挽输出，RX: 悬空输入） */
  GPIO_InitTypeDef gpio_init = {};
  gpio_init.GPIO_Speed = GPIO_Speed_50MHz;
 
  if (tx_enable)
  {
    (*write_port_) = WriteFun;
    gpio_init.GPIO_Pin = tx_gpio_pin;
    gpio_init.GPIO_Mode = GPIO_Mode_AF_PP;
    GPIO_Init(tx_gpio_port, &gpio_init);
    RCC_APB2PeriphClockCmd(CH32GetGPIOPeriph(tx_gpio_port), ENABLE);
  }
 
  if (rx_enable)
  {
    (*read_port_) = ReadFun;
    gpio_init.GPIO_Pin = rx_gpio_pin;
    gpio_init.GPIO_Mode = GPIO_Mode_IN_FLOATING;
    GPIO_Init(rx_gpio_port, &gpio_init);
    RCC_APB2PeriphClockCmd(CH32GetGPIOPeriph(rx_gpio_port), ENABLE);
  }
 
  /* 可选：引脚重映射 */
  if (pin_remap != 0)
  {
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
    GPIO_PinRemapConfig(pin_remap, ENABLE);
  }
 
  /* 串口外设时钟使能 */
  if (CH32_UART_APB_MAP[id] == 1)
  {
    RCC_APB1PeriphClockCmd(CH32_UART_RCC_PERIPH_MAP[id], ENABLE);
  }
  else if (CH32_UART_APB_MAP[id] == 2)
  {
    RCC_APB2PeriphClockCmd(CH32_UART_RCC_PERIPH_MAP[id], ENABLE);
  }
  else
  {
    ASSERT(false);
  }
  RCC_AHBPeriphClockCmd(CH32_UART_RCC_PERIPH_MAP_DMA[id], ENABLE);
 
  // 3. USART 配置
  USART_InitTypeDef usart_cfg = {};
  usart_cfg.USART_BaudRate = config.baudrate;
  usart_cfg.USART_StopBits =
      (config.stop_bits == 2) ? USART_StopBits_2 : USART_StopBits_1;
  switch (config.parity)
  {
    case UART::Parity::NO_PARITY:
      usart_cfg.USART_Parity = USART_Parity_No;
      usart_cfg.USART_WordLength = USART_WordLength_8b;
      break;
    case UART::Parity::EVEN:
      usart_cfg.USART_Parity = USART_Parity_Even;
      usart_cfg.USART_WordLength = USART_WordLength_9b;
      break;
    case UART::Parity::ODD:
      usart_cfg.USART_Parity = USART_Parity_Odd;
      usart_cfg.USART_WordLength = USART_WordLength_9b;
      break;
    default:
      ASSERT(false);
  }
 
  usart_cfg.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  usart_cfg.USART_Mode =
      (tx_enable ? USART_Mode_Tx : 0) | (rx_enable ? USART_Mode_Rx : 0);
  uart_mode_ = usart_cfg.USART_Mode;
  USART_Init(instance_, &usart_cfg);
 
  /* DMA 配置 */
  DMA_InitTypeDef dma_init = {};
  dma_init.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
  dma_init.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  dma_init.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  dma_init.DMA_Priority = DMA_Priority_High;
  dma_init.DMA_M2M = DMA_M2M_Disable;
 
  if (rx_enable)
  {
    DMA_DeInit(dma_rx_channel_);
    dma_init.DMA_PeripheralBaseAddr = (uint32_t)&instance_->DATAR;
    dma_init.DMA_MemoryBaseAddr = (uint32_t)dma_buff_rx_.addr_;
    dma_init.DMA_DIR = DMA_DIR_PeripheralSRC;
    dma_init.DMA_Mode = DMA_Mode_Circular;
    dma_init.DMA_BufferSize = dma_buff_rx_.size_;
    DMA_Init(dma_rx_channel_, &dma_init);
    DMA_Cmd(dma_rx_channel_, ENABLE);
    DMA_ITConfig(dma_rx_channel_, DMA_IT_TC, ENABLE);
    DMA_ITConfig(dma_rx_channel_, DMA_IT_HT, ENABLE);
    USART_DMACmd(instance_, USART_DMAReq_Rx, ENABLE);
  }
 
  if (tx_enable)
  {
    DMA_DeInit(dma_tx_channel_);
    dma_init.DMA_PeripheralBaseAddr = (u32)(&instance_->DATAR);
    dma_init.DMA_MemoryBaseAddr = 0;
    dma_init.DMA_DIR = DMA_DIR_PeripheralDST;
    dma_init.DMA_Mode = DMA_Mode_Normal;
    dma_init.DMA_BufferSize = 0;
    DMA_Init(dma_tx_channel_, &dma_init);
    DMA_ITConfig(dma_tx_channel_, DMA_IT_TC, ENABLE);
    USART_DMACmd(instance_, USART_DMAReq_Tx, ENABLE);
  }
 
  // 6. USART和相关中断
  USART_Cmd(instance_, ENABLE);
 
  if (rx_enable)
  {
    USART_ITConfig(instance_, USART_IT_IDLE, ENABLE);
    NVIC_EnableIRQ(CH32_DMA_IRQ_MAP[CH32_DMA_GetID(dma_rx_channel_)]);
  }
 
  if (tx_enable)
  {
    NVIC_EnableIRQ(CH32_DMA_IRQ_MAP[CH32_DMA_GetID(dma_tx_channel_)]);
  }
 
  NVIC_EnableIRQ(CH32_UART_IRQ_MAP[id]);
}

Member Function Documentation

ReadFun()

ErrorCode CH32UART::ReadFun ( ReadPort & port )

static

Definition at line 275 of file ch32_uart.cpp.

{
  UNUSED(port);
  // 接收由 IDLE 中断驱动，读取在 ISR 中完成
  return ErrorCode::EMPTY;
}

RxDmaIRQHandler()

void CH32UART::RxDmaIRQHandler ( DMA_Channel_TypeDef * channel, ch32_uart_id_t id )

static

Definition at line 393 of file ch32_uart.cpp.

{
  UNUSED(channel);
  auto uart = CH32UART::map[id];
  if (!uart) return;
 
  if (DMA_GetITStatus(CH32_UART_RX_DMA_IT_HT_MAP[id]) == SET)
  {
    DMA_ClearITPendingBit(CH32_UART_RX_DMA_IT_HT_MAP[id]);
    CH32_UART_RX_ISR_Handler(uart);
  }
 
  if (DMA_GetITStatus(CH32_UART_RX_DMA_IT_TC_MAP[id]) == SET)
  {
    DMA_ClearITPendingBit(CH32_UART_RX_DMA_IT_TC_MAP[id]);
    CH32_UART_RX_ISR_Handler(uart);
  }
}

SetConfig()

ErrorCode CH32UART::SetConfig ( UART::Configuration config )

virtual

设置 UART 配置 / Sets the UART configuration

Parameters

config

UART 配置信息 / UART configuration settings

Returns

返回操作状态，成功时返回 ErrorCode::OK，否则返回相应错误码 / Returns the operation status, ErrorCode::OK if successful, otherwise an error code

该方法为纯虚函数，子类必须实现具体的 UART 配置逻辑。 This is a pure virtual function. Subclasses must implement the specific UART configuration logic.

Implements LibXR::UART.

Definition at line 163 of file ch32_uart.cpp.

{
  USART_InitTypeDef usart_cfg = {};
  usart_cfg.USART_BaudRate = config.baudrate;
  usart_cfg.USART_StopBits =
      (config.stop_bits == 2) ? USART_StopBits_2 : USART_StopBits_1;
 
  switch (config.parity)
  {
    case UART::Parity::NO_PARITY:
      usart_cfg.USART_Parity = USART_Parity_No;
      usart_cfg.USART_WordLength = USART_WordLength_8b;
      break;
    case UART::Parity::EVEN:
      usart_cfg.USART_Parity = USART_Parity_Even;
      usart_cfg.USART_WordLength = USART_WordLength_9b;
      break;
    case UART::Parity::ODD:
      usart_cfg.USART_Parity = USART_Parity_Odd;
      usart_cfg.USART_WordLength = USART_WordLength_9b;
      break;
    default:
      return ErrorCode::NOT_SUPPORT;
  }
 
  usart_cfg.USART_Mode = uart_mode_;
  usart_cfg.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  USART_DeInit(instance_);
  USART_Init(instance_, &usart_cfg);
 
  if (uart_mode_ & USART_Mode_Rx)
  {
    USART_DMACmd(instance_, USART_DMAReq_Rx, ENABLE);
    USART_ITConfig(instance_, USART_IT_IDLE, ENABLE);
  }
 
  if (uart_mode_ & USART_Mode_Tx)
  {
    USART_DMACmd(instance_, USART_DMAReq_Tx, ENABLE);
  }
 
  USART_Cmd(instance_, ENABLE);
 
  return ErrorCode::OK;
}

TxDmaIRQHandler()

void CH32UART::TxDmaIRQHandler ( DMA_Channel_TypeDef * channel, ch32_uart_id_t id )

static

Definition at line 386 of file ch32_uart.cpp.

{
  if (DMA_GetITStatus(CH32_UART_TX_DMA_IT_MAP[id]) == RESET) return;
 
  if (channel->CNTR == 0) CH32_UART_ISR_Handler_TX_CPLT(id);
}

WriteFun()

ErrorCode CH32UART::WriteFun ( WritePort & port )

static

Definition at line 210 of file ch32_uart.cpp.

{
  CH32UART *uart = CONTAINER_OF(&port, CH32UART, _write_port);
  if (!uart->dma_buff_tx_.HasPending())
  {
    WriteInfoBlock info;
    if (port.queue_info_->Peek(info) != ErrorCode::OK)
    {
      return ErrorCode::EMPTY;
    }
 
    uint8_t *buffer = nullptr;
    bool use_pending = false;
 
    // DMA空闲判断
    bool dma_ready = uart->dma_tx_channel_->CNTR == 0;
    if (dma_ready)
    {
      buffer = reinterpret_cast<uint8_t *>(uart->dma_buff_tx_.ActiveBuffer());
    }
    else
    {
      buffer = reinterpret_cast<uint8_t *>(uart->dma_buff_tx_.PendingBuffer());
      use_pending = true;
    }
 
    if (port.queue_data_->PopBatch(buffer, info.data.size_) != ErrorCode::OK)
    {
      ASSERT(false);
      return ErrorCode::EMPTY;
    }
 
    if (use_pending)
    {
      uart->dma_buff_tx_.SetPendingLength(info.data.size_);
      uart->dma_buff_tx_.EnablePending();
      // 检查当前DMA是否可切换
      bool dma_ready = uart->dma_tx_channel_->CNTR == 0;
      if (dma_ready && uart->dma_buff_tx_.HasPending())
      {
        uart->dma_buff_tx_.Switch();
      }
      else
      {
        return ErrorCode::FAILED;
      }
    }
 
    port.queue_info_->Pop(uart->write_info_active_);
 
    DMA_Cmd(uart->dma_tx_channel_, DISABLE);
    uart->dma_tx_channel_->MADDR =
        reinterpret_cast<uint32_t>(uart->dma_buff_tx_.ActiveBuffer());
    uart->dma_tx_channel_->CNTR = info.data.size_;
    uart->_write_port.write_size_ = info.data.size_;
    DMA_Cmd(uart->dma_tx_channel_, ENABLE);
 
    uart->write_info_active_.op.UpdateStatus(false, ErrorCode::OK);
 
    return ErrorCode::FAILED;  // 实际是发起传输成功，但等待DMA完成
  }
  return ErrorCode::FAILED;
}

Field Documentation

_read_port

ReadPort LibXR::CH32UART::_read_port

Definition at line 35 of file ch32_uart.hpp.

_write_port

WritePort LibXR::CH32UART::_write_port

Definition at line 36 of file ch32_uart.hpp.

dma_buff_rx_

RawData LibXR::CH32UART::dma_buff_rx_

Definition at line 38 of file ch32_uart.hpp.

dma_buff_tx_

DoubleBuffer LibXR::CH32UART::dma_buff_tx_

Definition at line 39 of file ch32_uart.hpp.

dma_rx_channel_

DMA_Channel_TypeDef* LibXR::CH32UART::dma_rx_channel_

Definition at line 45 of file ch32_uart.hpp.

dma_tx_channel_

DMA_Channel_TypeDef* LibXR::CH32UART::dma_tx_channel_

Definition at line 46 of file ch32_uart.hpp.

id_

ch32_uart_id_t LibXR::CH32UART::id_

Definition at line 32 of file ch32_uart.hpp.

instance_

USART_TypeDef* LibXR::CH32UART::instance_

Definition at line 44 of file ch32_uart.hpp.

last_rx_pos_

size_t LibXR::CH32UART::last_rx_pos_ = 0

Definition at line 42 of file ch32_uart.hpp.

map

CH32UART * CH32UART::map = {nullptr}

static

Definition at line 48 of file ch32_uart.hpp.

uart_mode_

uint16_t LibXR::CH32UART::uart_mode_

Definition at line 33 of file ch32_uart.hpp.

write_info_active_

WriteInfoBlock LibXR::CH32UART::write_info_active_

Definition at line 40 of file ch32_uart.hpp.

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The documentation for this class was generated from the following files:

• driver/ch/ch32_uart.hpp
• driver/ch/ch32_uart.cpp